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A Universal Hardware / Software Co-Research Suite for Multi-Gigabit Networking Applications
CASE is seting new technology trend in biometrics based identification and verification systems. CASE launched the research work on the project “Massively Parallel Fingerprint Recognition System Architecture for Performing Multimillion Matches per Second” in Sep 2008 after winning a grant of 15 million Pak Rupees from National ICT R&D Fund. The project was directly contributed by seasoned engineers and research fellows from CASE and collaborative partner CARE. The research project invented state of the art fingerprint matching algorithms which transformed into a novel scalable fingerprint matching processor. The same novelty of the research project brought accolade to CASE by capturing first position in the R&D category at Pakistan All Software House Association ICT Awards 2010. The developed technology has the capability to attract a wide spectrum of commercial and military applications. As an outcome of this project, a research group has been developed in CASE working on state of the art algorithms in biometrics in general and fingerprint matching in particular.
Innovative and emerging server technologies including multi-core processing, virtualization, networked storage, and I/O convergence are contributing to a growing bandwidth requirement in the enterprise computing environment making it increasingly challenging for service providers to accommodate customer requests for services due to the bandwidth constraints of their network core. On the other hand, IT industry is transitioning away from network devices dedicated to forwarding packets and towards integrated service devices capable of multiple functions beyond routing like enhanced security; voice, video and conferencing; sophisticated traffic management; and even triple play. Likewise, the complexity of Internet-based services increased the demand for advanced monitoring applications designed for high-speed networks. The increased complexity of monitoring tasks such as anomaly detection, intrusion detection and traffic classification made software extremely attractive because it is more flexible and less expensive than dedicated hardware. The challenge now is how to design a common scalable platform despite the tendency to spread workload like applications, control plane and data plane across a diverse mix of hardware and software components.
To overcome this challenge a HW/SW co-research suite is developed at Net Centric Communications (NCCOMM) Group under the supervision of CASE Faculty members Dr. Zaheer Ahmed, Dr. Shoab Ahmed Khan and NCCOMM team members Asrar Ashraf, Nadeem Yousaf and Muhammad Shahbaz. The notion is to enable researchers compete with the invariable changes in the networking domain by providing them a scalable, customizable and above all a practical research platform. The research suite is an attractive combination of both hardware and software elements. The hardware is an FPGA based architecture provided with an initial code base for quickly building networking prototypes. In software a customizable network stack has been provided in kernel for communication between user and physical space.
NCCOMM is also collaborating with NetFPGA-10G group at Xilinx on various aspects of building a highly accessible and easy to manage user-friendly network suite using state of the art technologies including next-generation of Xilinx Embedded CAD tools.
Key Features:
Key features of the research suite are:
A common Packet bus interface for cross component connectivity in hardware
1G/10G Ethernet Interfaces with Packet bus interface
Packet aggregator for streaming multiple channels on a single channel
Packet distributor for forwarding packets to selected channel(s)
PCI Express Interface for host connectivity with DMA and multi-channel support
A user data path interface for programmed input/outputs
RLDRAM2, DDR2 and Flash memory interfaces with packet bus interfaces
Network stack with support for bump-in stack custom logic addition
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