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The National ICT R&D Fund (http://www.ictrdf.org.pk/) has been working jointly with
the industry and the academia since its establishment. Apart from the projects being
transferred from the PTCL R&D Fund, many projects are initiated by the National
ICT R&D fund itself. The National ICT R&D Fund has facilitated a large number of
projects by providing funds for the successful execution of these projects. One
of these research projects initiated by Center for Advanced Studies in Engineering
(CASE) is to develop a Massively Parallel Fingerprint Recognition System
Architecture for Performing Multi Million Marches per Second. For more details,
visit
www.ictrdf.org.pk/fp-mpfrs.htm.
Accurate automatic personal identification is critical in a variety of applications
in an electronically interconnected society. The need and interest in personal identification
systems has increased manifolds due to security concerns at national and international
level.
Among all the biometric techniques, fingerprint-based identification systems have
received the most attention because of the long history of fingerprints and their
extensive use in forensics. An automatic recognition of people based on fingerprints
requires that the input fingerprint be matched with a large number of fingerprints
in a database and high speed recognition is required.
There are not many companies which are providing High Density AFIS System. The offered
systems are very expensive in the tune of few US Million dollars and thus present
a good business opportunity for positioning. Most of these systems are SW based
solution and employ a cluster of computers for high density matching. This research
project will develop a high speed FPGA-based scalable Fingerprint Recognition System
Architecture. The architecture will be scalable for higher throughput applications.
The project aims to develop matching algorithms, which can be efficiently mapped
in Hardware for subsequent mapping on FPGA-based system. The project proposes to
develop this massively parallel fingerprint recognition system architecture for
performing multimillion matches per second for high-density applications.
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